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Magazine Name : Ieee Transactions On Very Large Scale Intergration (Vlsi) Systems

Year : 1999 Volume number : 07 Issue: 02

Universal Delay Test Sets For Logic Networks. (Article)
Subject: Delay Test , Design For Testability
Author: Uwe Sparmann      Hoger Muller      Sudhakar Reddy     
page:      156 - 166
Timing Constraints For High - Speed Counterflow - Clocked Pipelinng. (Article)
Subject: Clock Distribution , Clock Skew
Author: Jae-Tack Yoo      Ganesh Gopalakrishnan     
page:      167 - 173
Cobra: A 100-Mops Single-Chip Programmable And Expandable Fft. (Article)
Subject: Bit Parallel Arithmetic , Bit Serial Arithmetic
Author: Tom Chen      Glen Sunada     
page:      174 - 182
Data Parallel-Faultsimulation. (Article)
Subject: Computer Simulation , Ic Test
Author: Minesh B. Amin      Bapiraju Vinnakota     
page:      183 - 190
The Design Ofan Sram-Based Fileld-Programmable Gate Array-Part I: Architecture. (Article)
Subject: Sram Programmable
Author: Paul Chow      Soon Ong Seo      Jonathan Rose     
page:      191 - 197
Two-Dimensional Retiming. (Article)
Subject: Data Flow Graphs , Multidimensional Signal Processing
Author: C. Denk Tracy      Keshab K Parhi     
page:      198 - 211
A Coding Framework For Low-Power Address And Data Busses. (Article)
Subject: High-Capacitance Busses , Low-Power Design
Author: Sumant Ramprasad      Naresh R. Shanbhag     
page:      212 - 221
Hierachical Finite-State Machines And Their Use For Digitalcontrol. (Article)
Subject: Recursive Calls
Author: Valery Sklyarov     
page:      222 - 228
A Circuit-Driven Design Methodology For Video Signal - Processing Data Path Elements. (Article)
Subject: Area-Delay Design Tradeoffs , Multiport Register Files
Author: Santanu Dutta      Wayne Wolf     
page:      229 - 240
An Improved Bjt -Based Silicon Retina With Tunable Image Smoothing Capability. (Article)
Subject: Bjt-Based Silicon Retina , Tunable Smooth Area
Author: Chung-Yu Wu      Hsin-Chin Jiang     
page:      241 - 248
A Low Power Variable Lwngth Decoder For Mpeg-2 On Nonuniform Fine-Grain Table Partitioning. (Article)
Subject: Huffman , Low Power
Author: Thucydides Xanthopoulos      Anantha P Chandrakasan     
page:      249 - 257
Strategy For Power-Efficient Design Of Parallel Systems. (Article)
Subject: Low-Power Design , Memory
Author: Koen Danckaert      Konstantinos Masselos     
page:      258 - 265
A Multiple Clocking Scheme Forlow-Power Rtl Design. (Article)
Subject: Multiple Clock , Partitioning
Author: Christos A Papachristou      Mehrdad Nourani     
page:      266 - 276